1. Field of the Invention
The present invention relates to a method for manufacturing semiconductor devices having a so-called silicon on insulator (SOI) structure in which a semiconductor layer is provided on an insulating surface.
2. Description of the Related Art
As an alternative to a silicon wafer which is manufactured by thinly slicing an ingot of a single crystal semiconductor, an integrated circuit using a semiconductor substrate which is referred to as a silicon on an insulator (hereinafter also referred to as “SOI”) substrate in which a thin single crystal semiconductor layer is provided on an insulating surface has been developed. The integrated circuit using an SOI substrate has attracted attention as an integrated circuit which reduces parasitic capacitance between a drain of a transistor and the substrate and improves the performance of a semiconductor integrated circuit.
There are various methods for manufacturing an SOI substrate. As a method in which both quality of an SOI layer and ease of production (throughput) are realized, a method for manufacturing an SOI substrate which is referred to as a Smart Cut (registered trademark) is known. To form the SOI substrate, hydrogen ions are implanted into a silicon wafer (a bond wafer), and the bond wafer is bonded to a base wafer which becomes another base. A silicon layer which is bonded to the base wafer is subjected to heat treatment at approximately 500° C., thereby being separated from the bond wafer.
As an example of a semiconductor device using such an SOI substrate, a semiconductor device disclosed by the present applicant is known (see Patent Document 1: Japanese Published Patent Application No. 2000-012864).